For EAGLE users

If you create your circuit board layout with the EAGLE program from Cadsoft, please observe the following.

Design Rule Check: .dru file

To ensure the correct settings for your DRC, please use the corresponding EAGLE .dru file, which guarantees that we can produce your circuit boards free of errors. We have a .dru file available for download for each of the most common parameters:

Parameters .dru file
35µm Cu, 150µm / 100µm tracks, 0.3mm vias Multi-CB_035µm-Cu.dru
70µm Cu, 250mm tracks, 0.3mm vias Multi-CB_070µm-Cu.dru
105µm Cu, 300mm tracks, 0.3mm vias Multi-CB_105µm-Cu.dru
All .dru-files as .zip Multi-CB_Design-Rules-EAGLE.zip

Standard layers

To convert your EAGLE files, we use Eagle standard layers. Please specify any variations or extended layer specifications with your order.

  EAGLE name EAGLE layer
Top Layer top 1
  pads 17
  vias 18
Bottom Layer bottom 16
  pads 17
  vias 18
Solder-stop Top tstop 29
Solder-stop Bottom bstop 30
Marking Print tplace (f.e. [image*]) 21
  tnames (z.B. R1) 25
Contour milled, line width 1mil dimension 20
milling paths with the tool Ø; scoring lines with 1mil milling 46
drills pth (plated-through) drills 44
drills npth (non-plated-through) holes 45

 

The dimension layer 20 is only for display of the (outer and inner) milling contours with a line thickness of 1mil.

The milling contours including the milling diameter are defined in the milling layer 46.

Npth drill holes that are placed in the dimension layer will not be considered!

 

Marking print

Before exporting your data, you should always activate the option “vector font”, which is  found under: Options / User interface.

Otherwise your marking print will very probably be incorrectly applied (see EAGLE 5-Manual, page 44).

 
Printed Circuit Board marking print EAGLE

Marking print on panels

When copying and pasting circuit board layouts for panel creation, it may occur that EAGLE “increments” the labels, because only one unique part name is permitted. For instance, the name “R116” on the original board would become “R156” on the copy.

For a uniform marking print on panels, execute the EAGLE program’s “panelize.ulp”.

EAGLE Bug

The program Eagle 4.11 contains an error that can lead to non-functional circuit boards. Here is the original notice from Cadsoft:

Due to a recent problem that has occurred to an EAGLE user we would like to inform you about a bug in EAGLE version 4.11, which could lead to non-functional boards.

The problem occurs if a user creates a board with EAGLE version 4.09 (or earlier), in which he uses polygons (for instance for supply signals) and places rectangles in the layer tRestrict, bRestrict or 1 through 16, respectively, in such a way that there are places where a polygon can only "flow" through with exactly its own line width. If the CAM data is then generated with EAGLE version 4.11 it can happen that polygons are not calculated in the same way as seen by the user with his version of EAGLE. This in turn may cause some parts not to be connected, and render the board non-functional.

The bug was present in all EAGLE versions from 4.10r01 to 4.11. It is fixed in the current version 4.11r2 (and all beta versions since 4.11r01). Therefore we strongly advise to use the latest version of EAGLE, which is available for download from our homepage www.cadsoft.de

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Pricing Examples

Printed Circuit Boards always include:

- E-Test
- Solder-stop 2x
- Marking print 1x
- Gerber-Import
- Scoring (series)
- Design-Rule-Check

- Tooling costs
- Photoplot
- Conductors 150μm
- Drill holes 0,3mm
- Unlimited drilling
- HAL, FR4 1,6, 35μm Cu

Prototypes
2 layers - 6 WD
41,- €
1 Printed circuit board 100x100mm
4 layers - 6 WD
118,- €
1 Printed circuit board 160x100mm
6 layers - 8 WD
148,- €
1 Printed circuit board 160x100mm
Series
e.g. 100 pcs. Eurocard 100x160mm
2 layers - each
4,76 €
 
4 layers - each
7,41 €
 
6 layers - each
11,20 €
 
8 layers - each
16,05 €
 
SMD Stencils
max. 200x300mm - 3WD
47,50 €
1 Stencil, including 1000 pads
max. 600x600mm - 3WD
90,44 €
1 Stencil, including 2500 pads

Directly from your data

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Design-Aid

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